FIG. 1 shows a reverse-conducting insulated gate bipolar transistor (RC-IGBT) with a planar gate electrode according to a known implementation. As shown in FIG. 1, the RC-IGBT includes within one wafer 10 an insulated gate bipolar transistor with a built-in freewheeling diode. Such a reverse-conducting semiconductor device 150 includes an n-type drift layer 3 with a first main side, which is the emitter side 11 of the integrated IGBT, and a second main side, which is the collector side 15 of the IGBT and which lies opposite the emitter side 11. A p-doped base layer 4 is arranged on the emitter side 11. On the base layer 4 n-doped source regions 6 with a higher doping than the drift layer 3 are arranged.
An electrically insulating layer 78 is arranged on the emitter side 11 and covers the base layer 4 and the drift layer 3 and partially covers the source regions 6. An electrically conductive planar gate electrode 7 is completely embedded in the insulating layer 78. Above the central part of the base layer 4 no source region or electrically insulating layer is arranged.
An emitter electrode 2 is arranged on this central part of the base layer 4, which also covers the insulating layer 78. The emitter electrode 2 is in direct electrical contact to the source region 6 and the base layer 4 within a contact area 22, but is electrically insulated from the planar gate electrode 7 by a further insulating layer 782.
On the collector side 15, a buffer layer 9 is arranged on the drift layer 3. On the buffer layer 9 on the side opposite the drift layer 3, a first layer 8 with alternating n-type first regions 81 and p-doped second regions 85 is arranged. The first regions 81 as well as the buffer layer 9 have a higher doping concentration than the drift layer 3.
A collector electrode 25 is arranged on the collector side 15 and it covers the first and the second regions 81, 85 and is in direct electrical contact to them.
In such a prior art reverse-conducting semiconductor device 150 a freewheeling diode is formed between the collector electrode 25, part of which forms a cathode electrode in the diode, the n-type first regions 81, which form a cathode region in the diode, the drift layer 3, part of which forms the diode drift layer, the p-type base layer 4, part of which forms an anode region in the diode and the emitter electrode 2, which forms an anode in the diode.
An insulated gate bipolar transistor (IGBT) is formed between the collector electrode 25, part of which forms the IGBT collector electrode, the p-type second regions 85, which form a collector layer in the IGBT, the drift layer 3, part of which forms the IGBT drift layer, the base layer 4, part of which forms a p-base layer in the IGBT, the source region 3, which forms a n-type IGBT source region, and the emitter electrode 2. During on-state of the IGBT an electrically conductive channel is formed between the emitter electrode 2, the source region 6 and the p-base layer 4 towards the n-drift layer 3.
In such a prior art reverse conducting (RC)-IGBT device the p-base layer 4 of the IGBT cell is utilized also as an anode of the internal diode when the device is in the diode mode. However, the p-base layer 4 is shorted to the n-source region 6 which might be connected with the drift layer 3 via the MOS channel. If the channel is open, the electron current is flowing through the channel and shorts the p-n junction between the p-base layer 4 and the drift layer 3. As a result, the p-n junction between the p-type base layer 4 and the drift layer 3 is not forward biased and hole injection is prevented. The current is maintained by the unipolar electron current flowing through the channel. The junction starts injecting eventually when the potential difference reaches the built in voltage of the junction, however, the voltage at the contacts could be much higher. When the hole injection starts, the conductivity of the drift layer 3 is modulated and the voltage drop is reduced. Therefore, depending on the gate voltage, the diode exhibits a characteristic MOS controlled negative resistance region (voltage snap-back) in the I-V characteristics. With the gate voltage above the threshold value, the snap back is the largest, while with the voltage below the threshold or negative, the channel is closed and the snap-back is absent completely.
In addition, the MOS channel is controlling the plasma concentration below the p-base layer 4 during the internal diode conduction. By applying a gate voltage above the threshold, the plasma is extracted through the induced channel, therefore reducing the plasma below the p-type base layer 4, which results in higher on-state losses compared to the situation when the gate emitter voltage is below the threshold level or negative.
In various applications gate control during the diode mode cannot be chosen freely, so the device should be able to provide good performance at positive gate voltages applied.
U.S. Pat. No. 5,702,961 shows an IGBT, which includes, in an alternating manner, base layers and p-doped anode layers, and on the collector side strictly aligned p-layers in the projection to the anode layers and n-doped layers in the projection to the base layers. This alternating arrangement, however, negatively influences the IGBT performance.
US 2005/0073004 A1 describes a prior art MOSFET device having a highly p-doped guard ring termination on the periphery of the device.
US 2005/045960 A1 describes a reverse conducting IGBT having trench gate electrodes. Two trench gates form an IGBT active cell. Between two such active cells, an anode layer is arranged, which is less p-doped and less deep than the base layer. This device also suffers from the p-layers being arranged in the same direction as the base layers (in a line with the base layers) and from the large contact area of the anode layer to the emitter electrode, from which high IGBT on-state losses result.
US 2007/0108468 A1 describes another reverse conducting IGBT, in which IGBT active cells alternate with areas, in which p-doped layers are arranged and wherein in the p-doped layers trenches are placed on emitter potential. The p-doped layers are widely contacted to the emitter electrode. Therefore, this device has the same disadvantages as mentioned above.